diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 80514f913..a9a589720 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -109,7 +109,6 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i8x16.sub` | `0x5a`| - | | `i8x16.sub_saturate_s` | `0x5b`| - | | `i8x16.sub_saturate_u` | `0x5c`| - | -| `i8x16.mul` | `0x5d`| - | | `i16x8.neg` | `0x62`| - | | `i16x8.any_true` | `0x63`| - | | `i16x8.all_true` | `0x64`| - | @@ -184,3 +183,9 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`. | `i32x4.widen_high_i16x8_s` | `0xcf`| - | | `i32x4.widen_low_i16x8_u` | `0xd0`| - | | `i32x4.widen_high_i16x8_u` | `0xd1`| - | +| `i16x8.load8x8_u` | `0xd2`| m:memarg | +| `i16x8.load8x8_s` | `0xd3`| m:memarg | +| `i32x4.load16x4_u` | `0xd4`| m:memarg | +| `i32x4.load16x4_s` | `0xd5`| m:memarg | +| `i64x2.load32x2_u` | `0xd6`| m:memarg | +| `i64x2.load32x2_s` | `0xd7`| m:memarg | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 7ef69ec39..3ced5d861 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -86,7 +86,6 @@ | `i8x16.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_s` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i8x16.sub_saturate_u` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | -| `i8x16.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.any_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | `i16x8.all_true` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | @@ -145,6 +144,12 @@ | `f64x2.convert_u/i64x2` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: | | `v8x16.swizzle` | | | :heavy_check_mark: | | | `v8x16.shuffle` | | | :heavy_check_mark: | :heavy_check_mark: | +| `i16x8.load8x8_u` | | | | | +| `i16x8.load8x8_s` | | | | | +| `i32x4.load16x4_u` | | | | | +| `i32x4.load16x4_s` | | | | | +| `i64x2.load32x2_u` | | | | | +| `i64x2.load32x2_s` | | | | | | `i8x16.narrow_i16x8_s` | | :heavy_check_mark: | :heavy_check_mark: | | | `i8x16.narrow_i16x8_u` | | :heavy_check_mark: | :heavy_check_mark: | | | `i16x8.narrow_i32x4_s` | | :heavy_check_mark: | :heavy_check_mark: | | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index c8a4f0a23..04c700092 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -367,7 +367,6 @@ def S.sub(a, b): ``` ### Integer multiplication -* `i8x16.mul(a: v128, b: v128) -> v128` * `i16x8.mul(a: v128, b: v128) -> v128` * `i32x4.mul(a: v128, b: v128) -> v128` @@ -675,6 +674,17 @@ Load a `v128` vector from the given heap address. Load a single element and splat to all lanes of a `v128` vector. +### Load and Extend + +* `i16x8.load8x8_u(memarg) -> v128`: load eight 8-bit integers and zero extend each one to a 16-bit lane +* `i16x8.load8x8_s(memarg) -> v128`: load eight 8-bit integers and sign extend each one to a 16-bit lane +* `i32x4.load16x4_u(memarg) -> v128`: load four 16-bit integers and zero extend each one to a 32-bit lane +* `i32x4.load16x4_s(memarg) -> v128`: load four 16-bit integers and sign extend each one to a 32-bit lane +* `i64x2.load32x2_u(memarg) -> v128`: load two 32-bit integers and zero extend each one to a 64-bit lane +* `i64x2.load32x2_s(memarg) -> v128`: load two 32-bit integers and sign extend each one to a 64-bit lane + +Fetch consequtive integers up to 32-bit wide and produce a vector with lanes up to 64 bits. + ### Store * `v128.store(memarg, data: v128)`