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guoxin049guoxin049
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fix issues 108019
1 parent f5a65d8 commit 0fbbab4

25 files changed

+208
-217
lines changed

‎llvm/lib/CodeGen/TargetOptionsImpl.cpp

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -22,10 +22,6 @@ using namespace llvm;
2222
/// DisableFramePointerElim - This returns true if frame pointer elimination
2323
/// optimization should be disabled for the given machine function.
2424
bool TargetOptions::DisableFramePointerElim(const MachineFunction &MF) const {
25-
// Check to see if the target want to forcibly keep frame pointer.
26-
if (MF.getSubtarget().getFrameLowering()->keepFramePointer(MF))
27-
return true;
28-
2925
const Function &F = MF.getFunction();
3026

3127
if (!F.hasFnAttribute("frame-pointer"))

‎llvm/lib/Target/ARM/ARMFrameLowering.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -203,6 +203,10 @@ bool ARMFrameLowering::hasFP(const MachineFunction &MF) const {
203203
const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
204204
const MachineFrameInfo &MFI = MF.getFrameInfo();
205205

206+
// Check to see if the target want to forcibly keep frame pointer.
207+
if (MF.getSubtarget().getFrameLowering()->keepFramePointer(MF))
208+
return true;
209+
206210
// ABI-required frame pointer.
207211
if (MF.getTarget().Options.DisableFramePointerElim(MF))
208212
return true;
@@ -2270,7 +2274,8 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
22702274
// to take advantage the eliminateFrameIndex machinery. This also ensures it
22712275
// is spilled in the order specified by getCalleeSavedRegs() to make it easier
22722276
// to combine multiple loads / stores.
2273-
bool CanEliminateFrame = !(requiresAAPCSFrameRecord(MF) && hasFP(MF));
2277+
bool CanEliminateFrame = !(requiresAAPCSFrameRecord(MF) && hasFP(MF)) &&
2278+
!MF.getTarget().Options.DisableFramePointerElim(MF);
22742279
bool CS1Spilled = false;
22752280
bool LRSpilled = false;
22762281
unsigned NumGPRSpills = 0;

‎llvm/test/CodeGen/ARM/2011-03-15-LdStMultipleBug.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99

1010
@oStruct = external global %struct.Outer, align 4
1111

12-
define void @main(i8 %val8) nounwind {
12+
define void @main(i8 %val8) nounwind "frame-pointer"="none" {
1313
; CHECK-LABEL: main:
1414
; CHECK: @ %bb.0: @ %for.body.lr.ph
1515
; CHECK-NEXT: movw r0, :lower16:(L_oStruct$non_lazy_ptr-(LPC0_0+4))

‎llvm/test/CodeGen/ARM/2011-12-19-sjlj-clobber.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
; Radar 10567930: Make sure that all the caller-saved registers are saved and
44
; restored in a function with setjmp/longjmp EH. In particular, r6 was not
55
; being saved here.
6-
; CHECK: push {r4, r5, r6, r7, lr}
6+
; CHECK: push.w {r4, r5, r6, r7, r8, r10, r11, lr}
77

88
%0 = type opaque
99
%struct.NSConstantString = type { ptr, i32, ptr, i32 }

‎llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1732,7 +1732,7 @@ if.end:
17321732
; Another infinite loop test this time with two nested infinite loop.
17331733
; infiniteloop3
17341734
; bx lr
1735-
define void @infiniteloop3() "frame-pointer"="all" {
1735+
define void @infiniteloop3() "frame-pointer"="none" {
17361736
; ARM-LABEL: infiniteloop3:
17371737
; ARM: @ %bb.0: @ %entry
17381738
; ARM-NEXT: mov r0, #0

‎llvm/test/CodeGen/ARM/atomic-load-store.ll

Lines changed: 12 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -324,18 +324,17 @@ define void @test_old_store_64bit(ptr %p, i64 %v) {
324324
;
325325
; ARMOPTNONE-LABEL: test_old_store_64bit:
326326
; ARMOPTNONE: @ %bb.0:
327-
; ARMOPTNONE-NEXT: push {r4, r5, r7, lr}
328-
; ARMOPTNONE-NEXT: add r7, sp, #8
329-
; ARMOPTNONE-NEXT: push {r8, r10, r11}
330-
; ARMOPTNONE-NEXT: sub sp, sp, #24
331-
; ARMOPTNONE-NEXT: str r0, [sp, #4] @ 4-byte Spill
332-
; ARMOPTNONE-NEXT: str r2, [sp, #8] @ 4-byte Spill
333-
; ARMOPTNONE-NEXT: str r1, [sp, #12] @ 4-byte Spill
334-
; ARMOPTNONE-NEXT: dmb ish
335-
; ARMOPTNONE-NEXT: ldr r1, [r0]
336-
; ARMOPTNONE-NEXT: ldr r0, [r0, #4]
337-
; ARMOPTNONE-NEXT: str r1, [sp, #16] @ 4-byte Spill
338-
; ARMOPTNONE-NEXT: str r0, [sp, #20] @ 4-byte Spill
327+
; ARMOPTNONE-NEXT: push {r4, r5, r7, r8, r10, r11, lr}
328+
; ARMOPTNONE-NEXT: add r7, sp, #20
329+
; ARMOPTNONE-NEXT: sub sp, sp, #20
330+
; ARMOPTNONE-NEXT: str r0, [sp] @ 4-byte Spill
331+
; ARMOPTNONE-NEXT: str r2, [sp, #4] @ 4-byte Spill
332+
; ARMOPTNONE-NEXT: str r1, [sp, #8] @ 4-byte Spill
333+
; ARMOPTNONE-NEXT: dmb ish
334+
; ARMOPTNONE-NEXT: ldr r1, [r0]
335+
; ARMOPTNONE-NEXT: ldr r0, [r0, #4]
336+
; ARMOPTNONE-NEXT: str r1, [sp, #12] @ 4-byte Spill
337+
; ARMOPTNONE-NEXT: str r0, [sp, #16] @ 4-byte Spill
339338
; ARMOPTNONE-NEXT: b LBB5_1
340339
; ARMOPTNONE-NEXT: LBB5_1: @ %atomicrmw.start
341340
; ARMOPTNONE-NEXT: @ =>This Loop Header: Depth=1
@@ -382,8 +381,7 @@ define void @test_old_store_64bit(ptr %p, i64 %v) {
382381
; ARMOPTNONE-NEXT: LBB5_5: @ %atomicrmw.end
383382
; ARMOPTNONE-NEXT: dmb ish
384383
; ARMOPTNONE-NEXT: sub sp, r7, #20
385-
; ARMOPTNONE-NEXT: pop {r8, r10, r11}
386-
; ARMOPTNONE-NEXT: pop {r4, r5, r7, pc}
384+
; ARMOPTNONE-NEXT: pop {r4, r5, r7, r8, r10, r11, pc}
387385
;
388386
; THUMBTWO-LABEL: test_old_store_64bit:
389387
; THUMBTWO: @ %bb.0:

‎llvm/test/CodeGen/ARM/call-tc.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ define void @t1() "frame-pointer"="all" {
1717
ret void
1818
}
1919

20-
define void @t2() "frame-pointer"="all" {
20+
define void @t2() "frame-pointer"="none" {
2121
; CHECKV6-LABEL: t2:
2222
; CHECKV6: bx r0
2323
; CHECKT2D-LABEL: t2:
@@ -102,7 +102,7 @@ bb:
102102

103103
; Make sure codegenprep is duplicating ret instructions to enable tail calls.
104104
; rdar://11140249
105-
define i32 @t8(i32 %x) nounwind ssp "frame-pointer"="all" {
105+
define i32 @t8(i32 %x) nounwind ssp "frame-pointer"="none" {
106106
entry:
107107
; CHECKT2D-LABEL: t8:
108108
; CHECKT2D-NOT: push

‎llvm/test/CodeGen/ARM/debug-frame.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -526,7 +526,7 @@ entry:
526526
; Test 4
527527
;-------------------------------------------------------------------------------
528528

529-
define void @test4() nounwind {
529+
define void @test4() nounwind "frame-pointer"="none" {
530530
entry:
531531
ret void
532532
}

‎llvm/test/CodeGen/ARM/ehabi.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -575,7 +575,7 @@ entry:
575575
; Test 4
576576
;-------------------------------------------------------------------------------
577577

578-
define void @test4() nounwind {
578+
define void @test4() nounwind "frame-pointer"="none" {
579579
entry:
580580
ret void
581581
}

‎llvm/test/CodeGen/ARM/fast-isel-frameaddr.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ entry:
1616
; DARWIN-THUMB2: mov r0, r7
1717

1818
; LINUX-ARM-LABEL: frameaddr_index0:
19-
; LINUX-ARM: push {r11, lr}
19+
; LINUX-ARM: push {r11}
2020
; LINUX-ARM: mov r11, sp
2121
; LINUX-ARM: mov r0, r11
2222

@@ -42,7 +42,7 @@ entry:
4242
; DARWIN-THUMB2: ldr r0, [r7]
4343

4444
; LINUX-ARM-LABEL: frameaddr_index1:
45-
; LINUX-ARM: push {r11, lr}
45+
; LINUX-ARM: push {r11}
4646
; LINUX-ARM: mov r11, sp
4747
; LINUX-ARM: ldr r0, [r11]
4848

@@ -73,7 +73,7 @@ entry:
7373
; DARWIN-THUMB2: ldr r0, [r0]
7474

7575
; LINUX-ARM-LABEL: frameaddr_index3:
76-
; LINUX-ARM: push {r11, lr}
76+
; LINUX-ARM: push {r11}
7777
; LINUX-ARM: mov r11, sp
7878
; LINUX-ARM: ldr r0, [r11]
7979
; LINUX-ARM: ldr r0, [r0]

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