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Commit f6ffe48

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clang-format fixes
1 parent b3a6687 commit f6ffe48

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2 files changed

+11
-11
lines changed

2 files changed

+11
-11
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -27373,11 +27373,11 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
2737327373

2737427374
// If inserting an UNDEF, just return the original vector (unless it makes the
2737527375
// result more poisonous).
27376-
if (N1.isUndef()){
27376+
if (N1.isUndef()) {
2737727377
if (VT.isFixedLengthVector()) {
2737827378
unsigned SubVecNumElts = N1.getValueType().getVectorNumElements();
27379-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
27380-
InsIdx, InsIdx + SubVecNumElts);
27379+
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(), InsIdx,
27380+
InsIdx + SubVecNumElts);
2738127381
if (DAG.isGuaranteedNotToBePoison(N0, EltMask))
2738227382
return N0;
2738327383
} else if (DAG.isGuaranteedNotToBePoison(N0))
@@ -27398,8 +27398,8 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
2739827398
return N1.getOperand(0);
2739927399
if (VT.isFixedLengthVector() && N1VT.isFixedLengthVector()) {
2740027400
unsigned SubVecNumElts = N1VT.getVectorNumElements();
27401-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
27402-
InsIdx, InsIdx + SubVecNumElts);
27401+
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(), InsIdx,
27402+
InsIdx + SubVecNumElts);
2740327403
if (DAG.isGuaranteedNotToBePoison(N1.getOperand(0), ~EltMask))
2740427404
return N1.getOperand(0);
2740527405
} else if (DAG.isGuaranteedNotToBePoison(N1.getOperand(0)))

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -7920,8 +7920,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
79207920
// But not if skipping the insert could make the result more poisonous.
79217921
if (N2.isUndef()) {
79227922
if (N3C && VT.isFixedLengthVector()) {
7923-
APInt EltMask = APInt::getOneBitSet(VT.getVectorNumElements(),
7924-
N3C->getZExtValue());
7923+
APInt EltMask =
7924+
APInt::getOneBitSet(VT.getVectorNumElements(), N3C->getZExtValue());
79257925
if (isGuaranteedNotToBePoison(N1, EltMask))
79267926
return N1;
79277927
} else if (isGuaranteedNotToBePoison(N1))
@@ -7974,8 +7974,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
79747974
if (VT.isFixedLengthVector() && N2VT.isFixedLengthVector()) {
79757975
unsigned LoBit = N3->getAsZExtVal();
79767976
unsigned HiBit = LoBit + N2VT.getVectorNumElements();
7977-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
7978-
LoBit, HiBit);
7977+
APInt EltMask =
7978+
APInt::getBitsSet(VT.getVectorNumElements(), LoBit, HiBit);
79797979
if (isGuaranteedNotToBePoison(N2.getOperand(0), ~EltMask))
79807980
return N2.getOperand(0);
79817981
} else if (isGuaranteedNotToBePoison(N2.getOperand(0)))
@@ -7988,8 +7988,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
79887988
if (VT.isFixedLengthVector()) {
79897989
unsigned LoBit = N3->getAsZExtVal();
79907990
unsigned HiBit = LoBit + N2VT.getVectorNumElements();
7991-
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(),
7992-
LoBit, HiBit);
7991+
APInt EltMask =
7992+
APInt::getBitsSet(VT.getVectorNumElements(), LoBit, HiBit);
79937993
if (isGuaranteedNotToBePoison(N1, EltMask))
79947994
return N1;
79957995
} else if (isGuaranteedNotToBePoison(N1))

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