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yaml --- r: 262479 b: refs/heads/snap-stage3 c: 7732c0a h: refs/heads/master i: 262477: 5693717 262475: 566b8c9 262471: 47c249a 262463: 273d86a
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[refs]

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refs/heads/master: 5a0308abadce38396f27122d5c8639ffb2a21469
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refs/heads/snap-stage3: bafea3bf78e75c99958ef15fd3d06652cb63133c
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refs/heads/snap-stage3: 7732c0aa9ea12262cbe46fa77c2fa636e8aecf6a
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refs/heads/try: 29d24a3b02cb805da19450bf9830a8f0a6bd859c
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refs/tags/release-0.1: 1f5c5126e96c79d22cb7862f75304136e204f105
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refs/tags/release-0.2: c870d2dffb391e14efb05aa27898f1f6333a9596

branches/snap-stage3/src/liballoc_jemalloc/lib.rs

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@@ -56,8 +56,7 @@ const MIN_ALIGN: usize = 8;
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#[cfg(all(any(target_arch = "x86",
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target_arch = "x86_64",
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target_arch = "aarch64",
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target_arch = "powerpc64",
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target_arch = "powerpc64le")))]
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target_arch = "powerpc64")))]
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const MIN_ALIGN: usize = 16;
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// MALLOCX_ALIGN(a) macro

branches/snap-stage3/src/librustc_trans/trans/cabi_powerpc64.rs

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@@ -158,7 +158,7 @@ fn classify_ret_ty(ccx: &CrateContext, ty: Type) -> ArgType {
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}
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// The PowerPC64 big endian ABI doesn't return aggregates in registers
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if ccx.sess().target.target.arch == "powerpc64" {
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if ccx.sess().target.target.target_endian == "big" {
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return ArgType::indirect(ty, Some(Attribute::StructRet))
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}
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