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ss_spi.c: fix CTRLR0 write in ss_spi_set_data_mode() #340

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ss_spi.c: fix CTRLR0 write in ss_spi_set_data_mode() #340

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5 changes: 3 additions & 2 deletions system/libarc32_arduino101/drivers/spi_priv.h
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Original file line number Diff line number Diff line change
Expand Up @@ -60,8 +60,9 @@
#define SPI_NDF_SET_MASK (0x0000ffff)
#define SPI_SRL_SET_MASK (0xfffff7ff)
#define SPI_TMOD_SET_MASK (0xfffffcff)
#define SPI_SCPL_SET_MASK (0xffffff7f)
#define SPI_SCPH_SET_MASK (0xffffffbf)
#define SPI_SCPL_SET_MASK (0x80)
#define SPI_SCPH_SET_MASK (0x40)
#define SPI_FRF_SET_MASK (0x30)
#define SPI_DFS_SET_MASK (0xfffffff0)

#define SPI_CLK_ENABLED (1 << 15)
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4 changes: 2 additions & 2 deletions system/libarc32_arduino101/drivers/ss_spi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -103,8 +103,8 @@ void ss_spi_set_data_mode(SPI_CONTROLLER controller_id, uint8_t dataMode)

/* Set frame size, bus mode and transfer mode */
ctrl = READ_ARC_REG(dev->reg_base + CTRL);
ctrl &= (SPI_SCPL_SET_MASK & SPI_SCPH_SET_MASK);
ctrl = (dataMode << 6);
ctrl |= (SPI_SCPL_SET_MASK | SPI_SCPH_SET_MASK);
ctrl |= (dataMode << 4) & ~SPI_FRF_SET_MASK;
WRITE_ARC_REG(ctrl, dev->reg_base + CTRL);

/* re-enable controller */
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Binary file modified variants/arduino_101/libarc32drv_arduino101.a
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