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arch-amdgcnAMD GCN / RDNAAMD GCN / RDNAarch-loongarch32-bit and 64-bit LoongArch32-bit and 64-bit LoongArcharch-m68kMotorola 68000 seriesMotorola 68000 seriesarch-nvptxNVIDIA PTXNVIDIA PTXarch-powerpc32-bit and 64-bit Power ISA32-bit and 64-bit Power ISAarch-s390x64-bit IBM z/Architecture64-bit IBM z/Architecturearch-wasm32-bit and 64-bit WebAssembly32-bit and 64-bit WebAssemblyarch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.os-emscriptenhttps://emscripten.org/https://emscripten.org/standard libraryThis issue involves writing Zig code for the standard library.This issue involves writing Zig code for the standard library.zig ccZig as a drop-in C compiler featureZig as a drop-in C compiler feature
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- [NVPTX] Add tcgen05 alloc/dealloc intrinsics llvm/llvm-project#124961 (data layout change)
- [NVPTX] Add support for Shared Cluster Memory address space [1/2] llvm/llvm-project#135444 (data layout and address space changes)
- f2f36c4
- [SystemZ] Add support for half (fp16) llvm/llvm-project#109164
- [NVPTX] Basic support for fp128 as a storage type llvm/llvm-project#136006
- CPU features are not passed to clang when assembling #10411
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Line 242 in bb79c85
// .{ .cpu_arch = .s390x, .os_tag = .zos, .abi = .none }, -
Lines 355 to 356 in bb79c85
// .{ .cpu_arch = .xtensa, .os_tag = .freestanding, .abi = .none }, // .{ .cpu_arch = .xtensa, .os_tag = .linux, .abi = .none }, - On wasm fmt print of u64 packed struct triggers WebAssembly translation error #20966
- [AMDGPU] Set AS8 address width to 48 bits llvm/llvm-project#139419 (data layout change)
- [Clang][Wasm] Set __float128 alignment to 64 for emscripten llvm/llvm-project#146494 (C alignment change)
- [Clang] Partially fix m68k alignments llvm/llvm-project#144740 (C alignment change)
- [LoopSimplifyCFG] Add check for missing loop preheader llvm/llvm-project#149743
- [clang][LoongArch] Add support for the _Float16 type llvm/llvm-project#141703
Previous upgrade: #22014
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arch-amdgcnAMD GCN / RDNAAMD GCN / RDNAarch-loongarch32-bit and 64-bit LoongArch32-bit and 64-bit LoongArcharch-m68kMotorola 68000 seriesMotorola 68000 seriesarch-nvptxNVIDIA PTXNVIDIA PTXarch-powerpc32-bit and 64-bit Power ISA32-bit and 64-bit Power ISAarch-s390x64-bit IBM z/Architecture64-bit IBM z/Architecturearch-wasm32-bit and 64-bit WebAssembly32-bit and 64-bit WebAssemblyarch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.os-emscriptenhttps://emscripten.org/https://emscripten.org/standard libraryThis issue involves writing Zig code for the standard library.This issue involves writing Zig code for the standard library.zig ccZig as a drop-in C compiler featureZig as a drop-in C compiler feature